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Infinera —
San Jose, California,
United States
. As a design member of the ASIC team, you will be: 1.Identify DSP design requirements working ... Infinera Location: Bangalore, India Full/Part Time: Full time Posted Date: Posted 30+ Days Ago Req ... ID: 2023565 Your Key Responsibilities Would Include: Job Responsibilities: ASIC team is responsible
Reference no: 240236272
Posted on: 04/30/2024
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Infinera —
San Jose, California,
United States
Responsibilities: Support for RFP/RFQ Network Design responses and network optimization Serve as Subject Matter ... to determine optimal architecture design for new products and platforms Develop tools to enable sales ... engineers to design and optimize network responses Development of back office systems to store
Reference no: 240235440
Posted on: 04/30/2024
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Infinera —
San Jose, California,
United States
: 2023635 Brief Description: The successful candidate shall lead the design efforts of high-speed low-noise ... creativity and superior technical competency by leading the design efforts to help Infinera hold the market ... Functions and Key Responsibilities: Design, simulate, and verify the high frequency fractional-N PLLs
Reference no: 240235756
Posted on: 04/30/2024
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Infinera —
San Jose, California,
United States
: 20211341 The successful candidate shall lead the design efforts of high-speed low-noise clocking circuity ... technical competency by leading the design efforts to help Infinera hold the market leadership. We ... Responsibilities: Design, simulate, and verify the high frequency fractional-N PLLs. Architect, model
Reference no: 240236532
Posted on: 04/30/2024
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Infinera —
San Jose, California,
United States
on the Architecture, Design, Verification of Next Generation client interface solutions. As a company, Infinera ... in design and verification, emulation, platform experts who develop SW and FW In this role, you will work ... to write tests, debug the failures, run regressions, work with design team, work with other
Reference no: 240236179
Posted on: 04/30/2024
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Infinera —
San Jose, California,
United States
providers and 6 of the top 7 ICPs. We design, develop and deliver hardware and software for fiber-based ... : ASIC Physical Design Engineer Location: India Your Key Responsibilities Would Include: Perform ... for congestion analysis and timing closure at block level as well as full chip Work with logic designers
Reference no: 240236011
Posted on: 04/30/2024
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Infinera —
San Jose, California,
United States
(ICPs). We design, develop and deliver hardware and software for fiber-based connectivity solutions ... you to join our Ottawa ASIC design team. Staff ASIC Design Engineer Ottawa, Canada Responsibilities ... • Work as part of a world class ASIC design team, building leading edge chips for the Coherent
Reference no: 240236301
Posted on: 04/30/2024
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Infinera —
San Jose, California,
United States
: 20221036 Systems Design Engineer Portugal or Ottawa, Hybrid Office & Remote Infinera has a Network ... Description Key Responsibilities: • Support for RFP/RFQ Network Design responses and network optimization ... of network transition strategies to determine optimal architecture design for new products and platforms
Reference no: 240236424
Posted on: 04/30/2024
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Samsung Semiconductor, Inc. —
San Jose, California,
United States
. Here, youll have an opportunity to be part of a global leader whose innovative designs are pushing ... background and experience on core design of DRAM technology development. The candidate will be developing ... the next generation memory technology. The Principal Engineer, DRAM Core Design will be responsible
Reference no: 239609307
Posted on: 04/16/2024